1. Field of the Invention
The present invention relates to a method of polishing semiconductor wafers, (hereinafter may be referred to, for brevity, as "wafer"), in particular, the improvement of a method of secondary or final polishing of semiconductor wafers.
2. Description of the Related Art
Recently, the production of semiconductor wafers in industrial scales has rapidly expanded to great proportions. In precise processing of the semiconductor wafers, the demand level toward flatness and roughness of the processed wafer surface is upgraded and a large sum of investment is necessary for production machinery, inspection mechanism and others. It is an important problem to achieve the improvement of productivity and the reduction of production cost.
Generally, in the case of polishing a semiconductor wafer with a single side polishing machine, the semiconductor wafer surface is polished while holding the wafer on a carrier plate. There ape used three methods for holding the wafer. The first holding method is a wax method wherein a wafer is attached to a carrier with appropriate tacky wax coated on one side of the wafer. The second one is a waxless method wherein a wafer is vacuum chucked. The third one is another waxless method wherein a wafer is attached with water by the use of uncompressible material composed of porous resins.
In the wax method, due to the use of tacky wax for holding a semiconductor wafer, there are the following drawbacks 1 to 3. 1 Time and labor are required for attaching the semiconductor wafer to a carrier. 2 The semiconductor wafer to be processed by this method is contaminated with the residual wax. 3 The polished semiconductor wafer is likely to be contaminated or damaged when detaching the wafer from the carrier after polishing. Nonuniformity in the thickness of the coated wax is directly reflected to flatness and parallelism of the polished wafer. Therefore, uniformity in the thickness of the coated wax is necessary but wax coating is very difficult and requires a great amount of skill. Also, in recent times, the precision of the wafer specification is severe more and more because of fabrication of the integrated circuits higher in their density. Since the wax is coated manually, uniformity and reproducibility in the thickness of the wax per se must be limited. Moreover, this wax method requires removal of the wax after the polishing process which is a cause for disturbing the automation of this method.
However, the conventional waxless methods still have drawbacks in wafer bonding strength and parallelism and flatness of the polished wafer. In an effort to alleviate such drawbacks, there has been already proposed a waxless polishing method wherein a wafer is held with a backing pad excellent in wafer holding strength, parallelism and flatness and polished so that a polished wafer excellent in parallelism and flatness can be manufactured (Japanese Patent Laid-Open Publication No.4-13568).
Moreover, mirror polishing of a semiconductor wafer is often carried out with a double side polishing machine. In the double side polishing machine, since a wafer to be polished is held without wax as compared with a single side polishing machine, there is free from such drawbacks as exist in the single side polishing machine using wax for holding a wafer.
An example of the known double side polishing machine is described below together with FIGS. 5 and 6. FIG. 5 is a cross sectional schematic view of the double side polishing machine and FIG. 6 is a schematic plan view showing the double side polishing machine in which an upper polishing turn table is removed. In FIG. 5, the double side polishing machine 22 comprises a lower polishing turn table 24 and an upper polishing turn table 26 which are faced each other vertically. A lower polishing pad 24a is adhered on the upper surface of a lower polishing turn table 24 and an upper polishing pad 26a is adhered on the lower surface of the upper polishing turn table 26. The lower polishing turn table 24 and the upper polishing turn table 26 are rotated oppositely each other by a driving means (not shown). The lower polishing turn table 24 has a central gear 28 which is provided on the upper surface of the central portion thereof and an annular internal gear 30 which is provided in the proximity of the periphery thereof. Both the central gear 28 and the annular internal gear 30 are rotated independently of lower polishing turn table 24.
Reference numeral 32 denotes a carrier of disc shape which is supported between the upper surface of the lower polishing pad 24a of the lower polishing turn table 24 and the lower surface of the upper polishing pad 26a of the upper polishing turn table 26 and rotates and revolves slidably between the lower polishing pad 24a and the upper polishing pad 26a under the action of the central gear 28 and the internal gear 30.
The carrier 32 has a plurality of wafer holes 34. Wafers (W) which are to be polished are set in the wafer holes 34. When the wafers (W) are polished, a polishing agent is supplied to spaces between the wafers (W) and the polishing pads 24a, 26a via hole 38 formed in the upper polishing plate 26 from a nozzle 36. As the carrier 32 rotates and revolves, the wafers (W) rotates and revolve slidably between the lower polishing pad 24a and the upper polishing pad 26a, thereby both the sides of the wafers (W) being polished.
However, with the double side polishing machine, in order to improve the precision of the finished wafer surface, it is necessary to change the polishing pad to a soft polishing pad and the polishing agent to minute powdery abrasive grains, respectively, so that the frictional resistance between the semiconductor wafer and the polishing pad increases. The semiconductor wafer kept in the carrier of the double side polishing machine gets out of the carrier under the increased frictional resistance and the wafer is accidentally broken while polishing. The breakage of the wafer further leads to the damage of the polishing turn tables and the carrier whereby the manufacturing process disadvantageously suffers serious damage.
To obviate the above-mentioned drawbacks of mirror polishing operation of semiconductor wafers by the use of a double side polishing machine, there is proposed a method of polishing semiconductor wafers wherein mirror polishing of a semiconductor wafer comprises the first step for primary polishing of the wafer with a double side polishing machine having polishing surfaces which are formed by pouring a polishing agent to polishing pads and the second step for secondary polishing of one side of the wafer in slidable contact with a single side polishing machine which chucks by a vacuum chucking means another side of the wafer subjected to the primary polishing and has a polishing surface formed by pouring a polishing agent to a polishing pad softer than the polishing pads of the double side polishing machine so as to remove slight haze remaining in the one side due to the first step (Japanese Patent Publication No.1-22113). However, in the case of using a single side polishing machine of such a single wafer processing and single side chucking type as in the above proposed method of polishing wafers, there are following drawbacks. As the single side polishing machine can hold only one wafer at one time, the productivity thereof is low. Also, in the single side polishing machine, dust particles are often sandwiched between the chuking means and the chucking face (back side) of the wafer so that a lot of defective dimples in the front side of the wafer are generated and the configuration of the back side tends to be unfavorably transferred to the front side of the wafer.